The present invention relates to reducing redundant geometry rendering while providing state updates to each processor in a multiple graphical processor system.
Graphics processing subsystems are designed to render graphical images for computer, gaming, and other electronic systems. These subsystems typically include a graphics processing unit (GPU), which is a highly complex integrated circuit device optimized to perform graphics computations, and its memory, which is referred to as a graphics memory.
To meet ever increasing demands for realism and speed, some GPUs include more transistors than typical central processing units (CPUs). In addition, graphics memories have become quite large in order to improve system speed by reducing traffic on a system bus; some graphics cards now include as much as 512 MB of memory. But despite these advances, a demand for even greater realism and faster rendering persists.
As one approach to meeting this demand, NVIDIA Corporation of San Jose, Calif., has developed state of the art multi-chip SLI™ graphics processing subsystems, in which two or more GPUs operate in parallel. Parallel operation substantially increases the number of rendering operations that can be carried out.
When multiple processors operate in parallel, it is desirable that each perform a unique set of processing steps. That is, it is desirable that the multiple processors do not perform redundant tasks such as rendering operations. When fewer redundant rendering operations are performed, the efficiency of each processor is increased and the benefits that come from using multiple processors is realized to a greater extent.
These rendering operations are controlled by the receipt of rendering commands. Some rendering commands contain information regarding the state of the image, these may be referred to as state updates. State updates include changes in point of view, lighting, and the like. It is important that each processor in a multiple graphics processing system receive these updates.
Accordingly, it is desirable to prevent redundant geometry rendering while ensuring that each processor in a multiple graphics processor system receive necessary state updates.